CPU is the abbreviation for Central Processing Unit, which can be shortened to Microprocessor, but is often referred to as processor. Don't ignore its role because of these abbreviations, CPU is the core of the computer, its importance is like the brain for people, because it is responsible for processing, computing all the data inside the computer, and the motherboard chipset is more like the heart, it controls the exchange of data. the type of CPU determines the operating system you use and the corresponding software. the CPU is mainly composed of the operators, controllers, register groups and internal The CPU is composed of an operator, a controller, registers, and an internal bus, which is the core of the PC, together with storage, input/output interfaces, and a system bus to form a complete PC (personal computer). The registers are used to store operands and intermediate data after instructions have been executed, and the operator performs the calculations and operations specified in the instructions.

CPU Performance Indicators

1. Main Frequency

The main frequency, also known as the clock frequency, is measured in MHz (or GHz), and is used to indicate the speed of the CPU's operations and data processing.The main frequency of a CPU is the external frequency x the multiplier factor. Many people believe that the main frequency determines the operating speed of the CPU, which is not only a one-sided, but also for the server, this understanding also appeared to be biased. So far, there is no definitive formula to achieve the main frequency and the actual computing speed of the numerical relationship between the two, even the two major processor manufacturers Intel Intel and AMD, there is also a great deal of controversy on this point, from the development trend of Intel's products, you can see that Intel is very much focused on strengthening their own development of the main frequency. Like other processor manufacturers, someone once took a piece of 1G Allmart processor to do a comparison, it is equivalent to the running efficiency of the 2G Intel processor.

So, the CPU's main frequency is not directly related to the actual computing power of the CPU, and the main frequency indicates the speed of the digital pulse signal oscillation within the CPU. In Intel's processor offerings, you can also see examples of 1 GHz Itanium chips being able to perform almost as fast as a 2.66 GHz Xeon/Opteron, or 1.5 GHz Itanium 2 being about as fast as a 4 GHz Xeon/Opteron. The CPU speed also depends on the performance metrics of the CPU's pipeline, bus, and so on.

The CPU frequency is related to the actual computing speed, but it is only one aspect of the CPU performance, not the overall performance of the CPU.

2. The external frequency

The external frequency is the base frequency of the CPU in MHz, and the external frequency of the CPU determines the running speed of the whole motherboard. To put it plainly, in desktop computers, the overclocking referred to as overclocking is the CPU's external frequency (of course, in general, the CPU's multiplier frequency is locked), and I believe this point is well understood. But for the server CPU, overclocking is absolutely not allowed. As mentioned earlier, the CPU determines the operating speed of the motherboard, and the two are running in sync. If the server CPU is overclocked and the external frequency is changed, it will produce asynchronous operation, (many desktop motherboards support asynchronous operation), which will result in the instability of the entire server system.

The vast majority of current computer systems in the external frequency and the motherboard front-side bus is not synchronized speed, and the external frequency and front-side bus (FSB) frequency is easily confused, the following front-side bus introduction to talk about the difference between the two.

3. Front Side Bus (FSB) frequency

Front Side Bus (FSB) frequency (i.e., bus frequency) is a direct impact on the speed of direct data exchange between the CPU and memory. There is a formula to calculate, that is, data bandwidth = (bus frequency × data bit width)/8, the maximum bandwidth of data transmission depends on the width and transmission frequency of all simultaneously transmitted data. Let's say that the current Xeon Nocona with 64-bit support has a front-end bus of 800MHz, and according to the formula, its maximum bandwidth for data transfer is 6.4GB/sec.

The difference between the external frequency and the frequency of the front-side bus (FSB): the speed of the front-side bus refers to the speed of data transmission, and the external frequency is the speed of synchronous operation between the CPU and the motherboard. In other words, a 100MHz external frequency refers to the digital pulse signal oscillating 100 million times per second; while a 100MHz front-side bus refers to the amount of data transfer that the CPU can accept per second, which is 100MHz x 64bit ÷ 8bit/Byte = 800MB/s.

In fact, now that the "HyperTransport" architecture is available, the "HyperTransport" technology can be applied to the motherboard.



Auto Sync with Cloud
No manual interaction required to synchronize cloud services with cloud services, so there is no need to synchronize cloud services with cloud services. Tailored for Dual Xeon processors, the MCH they contain provides the CPU with a front-side bus frequency of 533MHz, and with DDR memory, the front-side bus bandwidth can reach 4.3GB/sec. However, the increasing performance of the processor also brings many problems to the system architecture. The "HyperTransport" architecture not only solves the problem, but also improves the bus bandwidth more effectively, such as AMD Opteron processors, flexible HyperTransport I/O bus architecture allows it to integrate the memory controller, so that the processor does not pass through the system bus to the chipset, but directly with the memory controller. The flexible HyperTransport I/O architecture of the AMD Opteron processor allows it to integrate a memory controller, allowing the processor to exchange data directly with the memory instead of passing it through the system bus to the chipset. In that case, the front-side bus (FSB) frequency is nowhere to be found on AMD Opteron processors.

4, CPU bit and word length

Bit: In digital circuits and computer technology using binary, the code is only "0" and "1", which is either "0" or "1". "0" or "1" in the CPU is a "bit".

Word length: The number of bits of a binary number that the CPU can process at one time in a unit of time (at the same time) is called the word length in computer technology. So a CPU that can handle 8-bit word length data is usually called an 8-bit CPU, and similarly a 32-bit CPU can handle 32-bit binary data in a unit of time. Difference between byte and word length: Since common English characters can be expressed in 8-bit binary, 8-bit is usually called a byte. The length of the word length is not fixed, for different CPUs, the length of the word length is not the same. 8-bit CPUs can only handle one byte at a time, while 32-bit CPUs can handle 4 bytes at a time, the same word length of 64-bit CPUs can handle 8 bytes at a time.

5. Multiplier factor

The multiplier factor is the relative ratio between the main frequency and the external frequency of the CPU. At the same external frequency, the higher the multiplier, the higher the frequency of the CPU. However, in reality, the higher the multiplier, the less significant the CPU itself is, given the same external frequency. This is because the data transfer speed between the CPU and the system is limited, the pursuit of high main frequency and get a high multiplier CPU will appear obvious "bottleneck" effect - the CPU from the system to get the data limit speed can not meet the speed of the CPU computing. Generally, except for the engineering sample version of Intel's CPU is locked multiplier, a small number of such as Inter Core 2 core Pentium Duo E6500K and some of the supreme version of the CPU does not lock the multiplier, and AMD did not lock before, and now AMD has launched a black-box version of the CPU (i.e., unlocked version of the multiplier, the user is free to adjust the multiplier, adjust the multiplier overclocking method than adjusting the external frequency of the stability of the more stable).

6

6. Cache

The size of the cache is also one of the important indicators of the CPU, and the structure and size of the cache has a very large impact on the speed of the CPU, the cache within the CPU operates at a very high frequency, generally at the same frequency as the processor, and the efficiency is much greater than the system memory and hard disk. In practice, the CPU often needs to repeatedly read the same block of data, and the increase in cache capacity can significantly improve the CPU internal read data hit rate, without having to go to memory or hard disk to find, in order to improve system performance. However, due to CPU chip size and cost considerations, caches are very small.

L1 Cache is the first level of CPU cache, divided into data cache and instruction cache. The capacity and structure of the built-in L1 cache has a large impact on the performance of the CPU, however, the cache memory is composed of static RAM, the structure is more complex, in the case of the CPU core area can not be too large, the capacity of the L1 level cache is not possible to do too much. The general server CPU L1 cache capacity is usually 32-256KB.

L2 Cache (L2 cache) is the CPU's second layer of cache, divided into internal and external two chips. The internal chip L2 cache runs at the same speed as the main frequency, while the external L2 cache is only half of the main frequency.The L2 cache capacity also affects the performance of the CPU, and the principle is that the bigger the better, the largest capacity of the CPU for home use was 512KB, and now the laptop can also reach 2M, while the L2 cache of the CPU for servers and workstations is even higher, and can reach more than 8M.

L3 cache is the most powerful cache in the world.

L3 Cache (L3 cache), divided into two kinds, the early is external, now are built-in. The actual role of the L3 cache is to further reduce memory latency and improve processor performance for large data-volume calculations. Reducing memory latency and increasing the ability to compute large amounts of data are both very helpful for gaming. And in the server space adding L3 cache still provides a significant performance boost. For example, a configuration with a larger L3 cache utilizes physical memory more efficiently, so its slower disk I/O subsystem can handle more data requests. Processors with larger L3 caches offer more efficient file system caching behavior and shorter message and processor queue lengths.

In fact, the earliest L3 cache was used in AMD's K6-III processors, where the L3 cache was limited by the manufacturing process and was not integrated into the chip, but rather on the motherboard. At that time, the L3 cache was not integrated into the chip due to the manufacturing process, but was integrated into the motherboard. The L3 cache, which was only able to synchronize with the system bus frequency, was not much different from the main memory. L3 cache was later used in Intel's Itanium processors for the server market. Intel also intended to introduce a 9MB L3 cache Itanium2 processor, and later a 24MB L3 cache dual-core Itanium2 processor.

But basically, the L3 cache is not very important to the performance of the processor. For example, a Xeon MP processor with a 1MB L3 cache is still not a match for the Opteron, which shows that an increase in the front-side bus is more effective than an increase in the cache to bring about a more effective performance improvement.

7. CPU Extended Instruction Set

CPUs rely on instructions to compute and control the system, and each CPU is designed with a series of instructions that match its hardware circuitry. The strength of the instructions is also an important indicator of the CPU, and the instruction set is one of the most effective tools for improving the efficiency of microprocessors. From the mainstream architecture at this stage, the instruction set can be divided into two parts: complex instruction set and streamlined instruction set, and from the specific use, such as Intel's MMX (Multi Media Extended), SSE, SSE2 (Streaming-Single instruction multiple data- Extensions 2), SSE3, SSE4 series and AMD's 3DNow! are all CPU extension instruction sets, which enhance the CPU's multimedia, graphics and Internet processing capabilities. Often referred to as the "CPU's instruction set", the SSE3 instruction set is also the smallest at present, with MMX containing 57 commands, SSE containing 50 commands, SSE2 containing 144 commands, and SSE3 containing 13 commands. SSE4 is also the most advanced instruction set, with Intel Core series processors already supporting SSE4, AMD will add support for SSE4 in future dual-core processors, and ANA processors will also support this instruction set.

8. CPU core and I/O voltage

Starting from the 586 CPU, the CPU operating voltage is divided into two kinds of core voltage and I/O voltage, and usually the core voltage of the CPU is less than or equal to the I/O voltage. The size of the kernel voltage is based on the CPU's production process, generally the smaller the production process, the lower the kernel operating voltage; I/O voltage is generally in the range of 1.6~5 V. Low voltage can solve the problem of excessive power consumption and high heat generation.

9. Manufacturing process

The micron of the manufacturing process is the distance between circuits and circuits within the IC. The trend of the manufacturing process is to develop in the direction of higher density. Higher density IC circuit design means that in the same size area of the IC, you can have a higher density and more complex functionality of the circuit design. Now the main 180nm, 130nm, 90nm, 65nm, 45nm. Recently it has been officially stated that there is a 32nm manufacturing process.

10. Instruction Set

(1) CISC Instruction Set

The CISC instruction set, also known as the Complex Instruction Set, is known in English as CISC, (an acronym for Complex Instruction Set Computer). In a CISC microprocessor, the instructions of a program are executed serially in sequence, and the individual operations in each instruction are also executed serially in sequence. The advantage of sequential execution is the simplicity of control, but the utilization of the computer parts is not high and the execution speed is slow. It is actually the x86 series (a.k.a. IA-32 architecture) CPUs produced by Intel and its compatible CPUs such as AMD and VIA. Even the new X86-64 (also known as AMD64) is now in the CISC category.

To know what is the instruction set from today's X86 architecture of the CPU to say. X86 instruction set is Intel for its first 16-bit CPU (i8086) specially developed, IBM launched in 1981 the world's first PC in the CPU-i8088 (i8086 simplified version) using the X86 instructions, while the computer to improve the floating floating instructions, and the computer to improve the floating instructions, and the computer to improve the floating instructions. instructions, while the X87 chip was added to the computer to improve floating-point data processing capabilities, and the X86 instruction set and X87 instruction set were later collectively referred to as the X86 instruction set.

Although with the continuous development of CPU technology, Intel has developed newer i80386, i80486 until the past PII Xtreme, PIII Xtreme, Pentium 3, Pentium 4 series, and finally to today's Core 2 series, Xtreme (excluding Xtreme Nocona), but in order to ensure that the computer continues to run in the past, the development of various applications to protect and inherit. However, in order to ensure that the computer can continue to run all kinds of applications developed in the past to protect and inherit the rich software resources, so all CPUs produced by Intel still continue to use the X86 instruction set, so its CPUs still belong to the X86 series. Because the Intel X86 series and its compatible CPUs (such as AMD Athlon MP,) all use the X86 instruction set, it forms today's huge lineup of X86 series and compatible CPUs. x86CPUs are now mainly available in two categories: intel's server CPUs and AMD's server CPUs.

(2) RISC instruction set

RISC is the English "Reduced Instruction Set Computing " abbreviation, the Chinese meaning is "streamlined instruction set". It is developed on the basis of the CISC instruction system, some people test the CISC machine shows that the frequency of use of various instructions is quite disparate, the most commonly used are some relatively simple instructions, they account for only 20% of the total number of instructions, but the frequency of the program accounted for 80%. Complex instruction systems inevitably increase the complexity of the microprocessor, making the processor's development time is long and high cost. And complex instructions require complex operations, which will inevitably reduce the speed of the computer. Based on the above reasons, RISC-type CPU was born in the 1980s. Compared with CISC-type CPU, RISC-type CPU not only streamlines the instruction system, but also adopts a kind of superscalar and super pipeline structure, which greatly increases the parallel processing capability. The RISC instruction set is the direction of development for high-performance CPUs. The RISC instruction set is the direction of development for high-performance CPUs, as opposed to the traditional CISC (Complex Instruction Set). Comparatively speaking, RISC has a unified instruction format, fewer types of instructions, and fewer addressing modes than the complex instruction set. Of course, the processing speed is much higher. Currently, CPUs with this instruction system are commonly used in mid-range and high-grade servers, especially high-end servers that all use RISC instruction system CPUs.RISC instruction system is more suitable for UNIX, the operating system of high-end servers, and now Linux also belongs to the UNIX-like operating system.RISC-type CPUs are not compatible with the CPUs of Intel and AMD, in terms of software and hardware. The RISC-type CPUs are not compatible with Intel and AMD CPUs in either software or hardware.

Currently, the CPUs that use RISC instructions in mid-range and high-end servers are mainly of the following types: PowerPC processors, SPARC processors, PA-RISC processors, MIPS processors, Alpha processors.

(3) IA-64

EPIC (Explicitly Parallel Instruction Computers) is the successor to the RISC and CISC systems there have been a lot of debates on whether or not it is the successor to the RISC and CISC systems, and in terms of the EPIC system alone, it's more like Intel's processors taking a major step forward into the RISC system. The EPIC system alone is more like an important step in the evolution of Intel's processors to the RISC system. Theoretically, CPUs designed in the EPIC architecture can handle Windows applications much better than Unix-based applications in the same host configuration.

Intel's server CPU with EPIC technology is the Anthem Itanium (development code name i.e. Merced). It is a 64-bit processor and the first in the IA-64 family. Microsoft has also developed an operating system codenamed Win64 to support it in software. After Intel adopted the X86 instruction set, it turned to more advanced 64-bit microprocessors. Intel did this because they wanted to get rid of the huge x86 architecture and introduce an energetic and powerful instruction set, and so the IA-64 architecture was born, using the EPIC instruction set. In many ways, IA-64 is a great improvement over x86. It breaks through many of the limitations of the traditional IA32 architecture and makes breakthroughs in data processing capabilities, system stability, security, usability, and visualization.

The biggest drawback of IA-64 microprocessors is their lack of compatibility with x86, and Intel, in order for IA-64 processors to better run the software of the two dynasties, it introduced on IA-64 processors (Itanium, Itanium2 ......) the x86-to- IA-64 decoder so that it could translate x86 instructions into IA-64 instructions. This decoder is not the most efficient decoder, nor is it the best way to run x86 code (the best way is to run x86 code directly on an x86 processor), and as a result, the performance of the Itanium and the Itanium2 when running x86 applications is very poor. This was the root cause of X86-64.

(4) X86-64 (AMD64 / EM64T)

Designed by AMD to handle 64-bit integer arithmetic at the same time, and compatible with the X86-32 architecture. It supports 64-bit logical addressing, with options to convert to 32-bit addressing; but data manipulation instructions default to 32-bit and 8-bit, with options to convert to 64-bit and 16-bit; and support for general-purpose registers, so that in the case of a 32-bit arithmetic operation, the result has to be scaled up to a full 64-bit. In this way, there is a difference between "direct execution" and "converted execution" of instructions, where the instruction field is either 8-bit or 32-bit, to avoid long fields.

The x86-64 (also known as AMD64) is not an empty gesture. x86 processors are limited to 4GB of memory for 32-bit addressing, and IA-64 processors are not compatible with x86. AMD has taken into account the needs of its customers and has enhanced the functionality of the x86 instruction set to support 64-bit arithmetic modes, which is why it calls their architecture x86-64. Technically, AMD has introduced new R8-R15 general-purpose registers as an expansion of the original X86 processor registers for 64-bit operations in the x86-64 architecture, but these registers are not fully utilized in the 32-bit environment. The original registers such as EAX and EBX have also been expanded from 32-bit to 64-bit. Eight new registers have been added to the SSE unit to provide support for SSE2. The increase in the number of registers will result in a performance increase. At the same time, in order to support both 32- and 64-bit code and registers, the x86-64 architecture allows the processor to operate in the following two modes: Long Mode and Legacy Mode, with Long Mode divided into two sub-modes (64bit mode and Compatibility mode). This standard has been introduced in AMD server processors for Opteron processors.

And this year also introduced support for 64-bit EM64T technology, and then not officially named EM64T before the IA32E, which is the name of Intel's 64-bit Extended Technology, used to distinguish between the X86 instruction set. Intel's EM64T support for 64-bit sub-mode, and AMD's X86-64 technology is similar to the 64-bit linear planar addressing, adding eight new general-purpose registers. Intel's EM64T supports 64-bit sub-mode, similar to AMD's X86-64 technology, and uses 64-bit linear plane addressing, adding eight new general purpose registers (GPRs), and eight additional registers to support SSE instructions. Similar to AMD, Intel's 64-bit technology will be compatible with both IA32 and IA32E, and will only use IA32E when running under a 64-bit operating system.IA32E will consist of 2 sub-modes: a 64-bit sub-mode and a 32-bit sub-mode, and is backward compatible like AMD64.Intel's EM64T will be fully compatible with AMD's X86-64 technology. Nocona processors now include some 64-bit technology, and Intel's Pentium 4E processors also support 64-bit technology.

It should be noted that both are 64-bit microprocessor architectures compatible with the x86 instruction set, but there are still some differences between EM64T and AMD64, and the NX bits in AMD64 processors will not be available in Intel's processors.

11. Hyperpipelining and superscalar

Before explaining hyperpipelining and superscalar, it's important to understand pipelines. Pipelines were first used by Intel in their 486 chips. The pipeline works like an assembly line in industrial production. In the CPU by 5-6 different functions of the circuit unit to form an instruction processing pipeline, and then an X86 instruction is divided into 5-6 steps, and then by these circuit units are executed, so that it can be realized in a CPU clock cycle to complete an instruction, thus increasing the speed of the CPU operation. Each of the classic Pentium integer pipelines is divided into four levels of flow, i.e., instruction prefetching, decoding, executing, and writing back the result, and the floating-point pipeline is further divided into eight levels of flow.

Superscalar is the simultaneous execution of multiple processors by building in multiple pipelines, which in essence trades space for time. Hyper pipelining, on the other hand, is the process of refining the pipeline and increasing the main frequency so that one or more operations can be completed in a single machine cycle, in essence trading time for space. For example, the pipeline of Pentium 4 is as long as 20 steps. The longer the step (level) of the pipeline design, the faster it completes an instruction, so that it can adapt to the work of a higher frequency CPU, but the pipeline is too long also brings certain side effects, it is likely that the main frequency of the CPU actual computing speed of the phenomenon of lower, Intel's Pentium 4 appeared in this case, although it can be as high as the main frequency of more than 1.4G, but its computing performance is From a broad classification point of view, CPUs installed in Socket sockets are usually packaged in PGA (grid array), while CPUs installed in Slot x slots are all packaged in SEC (Single Edge Connector Box). There are also PLGA (Plastic Land Grid Array) and OLGA (Organic Land Grid Array) packaging technologies. Due to the increasingly fierce competition in the market, the current direction of development of CPU packaging technology to cost savings.

13, multi-threading

Simultaneous multithreading Simultaneous multithreading, referred to as SMT. SMT can be replicated on the processor through the structure of the state of the processor, so that the same processor on the simultaneous execution of multiple threads and *** enjoy the processor's execution of resources, can maximize the realization of the wide launch, chaotic superscalar processing, improve the utilization of the processor computing components, improve the utilization of the processor computing components, and increase the efficiency of the processor. processor computing component utilization, and moderate access memory latency due to data correlation or Cache misses. When multiple threads are not available, the SMT processor is almost identical to a traditional wide-emission superscalar processor, and the appeal of SMT is that it requires only minor changes to the processor core design, resulting in significant performance improvements at little to no additional cost. Multi-threading technology, on the other hand, can reduce the idle time of the high-speed computing cores by preparing more data for processing. This is certainly very attractive for low-end desktop systems, and Intel will support SMT on all processors starting with the 3.06GHz Pentium 4.

14, multi-core

Multi-core, also refers to a single chip multiprocessors (Chip multiprocessors, referred to as CMP). CMP is proposed by Stanford University, the idea is to massively parallel processors in the SMP (symmetric multiprocessor) integrated into the same chip, each processor parallel execution of different processes. Compared with CMP, the flexibility of the SMT processor architecture is more prominent. However, as semiconductor processes move beyond 0.18 micron, line delays have exceeded gate delays, requiring microprocessors to be designed by dividing the basic cell structure into many smaller, better localized cells. In contrast, CMP structures have been more promising because they have been designed by dividing them into multiple processor cores, each of which is simpler and conducive to optimized design. Currently, IBM's Power 4 chip and Sun's MAJC5200 chip both use the CMP architecture. Multi-core processors can *** enjoy cache within the processor, improve cache utilization, while simplifying the complexity of multiprocessor system design.

In the second half of 2005, new processors from Intel and AMD will also incorporate the CMP architecture. Developed under the code name Montecito, the new Anthem processor is a dual-core design with a minimum of 18MB of on-chip cache, built on a 90nm process, and is designed to absolutely challenge the chip industry today. Each of its individual cores has separate L1, L2, and L3 cache and contains about 1 billion transistors.

15, SMP

SMP (Symmetric Multi-Processing), symmetric multi-processing structure of the abbreviation 16, NUMA technology

NUMA that is, non-uniform access to the distribution of *** enjoy the technology of storage, which is a number of independent nodes through a high-speed private network connected to the system, each node can be a single CPU or a private network. Each node can be a single CPU or SMP system. In NUMA, there are various solutions for Cache consistency, which require the support of the operating system and special software. An example of a Sequent NUMA system is shown in Figure 2. Here, three SMP modules are linked together in a high-speed private network to form a node, and each node can have up to 12 CPUs. systems like Sequent's can have up to 64 CPUs or even 256 CPUs. obviously, this is a combination of the two technologies, based on SMP and extended with NUMA technology.

17, out-of-order execution technology

Out-of-order execution (out-of-order execution), refers to the CPU allows a number of instructions not in accordance with the order of the program to be distributed to the corresponding circuit unit processing technology. This will be based on the state of the circuit unit and each instruction can be executed in advance of the analysis of the specific situation, will be able to execute in advance of the instruction is immediately sent to the corresponding circuit unit execution, during the period of time not in accordance with the prescribed order of execution of the instruction, and then by the re-arrangement of units will be the results of the execution of units in accordance with the order of the instruction re-arrangement. The purpose of using the chaotic execution technique is to make the internal circuitry of the CPU operate at full capacity and to increase the speed of the CPU's running program accordingly. Branching technology: (branch) instructions need to wait for the results of the operation, generally unconditional branching only need to be executed in the order of the instructions, while conditional branching must be based on the results of the processing, and then decide whether or not to carry out in the original order.

18, the memory controller inside the CPU

Manufacturing process: the current CPU manufacturing process is 0.35 micron, the latest PII can reach 0.28 micron, in the future the CPU manufacturing process can reach 0.18 micron.

CPU manufacturers

1. Intel Corporation

Intel is the big brother of the production of CPUs, personal computer market, which holds more than 80% of the market share, Intel's production of the CPU has become the de facto x86CPU technical specifications and standards. The latest Core 2 for the personal computer platform has become the CPU of choice, and the next generation of Core i5 and Core i7 have seized the opportunity to take a significant lead in performance over other manufacturers' products.

2. AMD

Currently using CPUs from several companies, in addition to Intel, the strongest challenge is AMD, the latest AMD Slew Dragon II X2 and Yi Long II has a very good price-performance ratio, especially with 3DNOW + technology and support for the SSE4.0 instruction set, so that it has a very good performance in 3D.

3. IBM and Cyrix

IBM's strength lies in the high-end labs, studios, non-civilian CPU

National Semiconductor NS and Cyrix merger, so that it finally has its own chip production line, the finished product will be increasingly perfect and complete. The current MII also performs well, especially since it's so inexpensive.

4. IDT Corporation

IDT is a rising star among processor makers, but it's not quite there yet.

5. VIA VIA

VIA VIA is a motherboard chipset manufacturer in Taiwan, the acquisition of the aforementioned Cyrix and IDT's cpu department, launched their own CPU

6. Has been able to reach the market now INTEL and AMD's low-end CPU level,

7.ARM Ltd

Anmou International Technology, a few only authorized its CPU design without manufacturing the company. Embedded application software is most often executed by ARM architecture microprocessors.

8. Freescale Semiconductor

Formerly Motorola, Freescale designs several embedded devices and SoC PowerPC processors.

[Edit]History

Anything from development to growth will go through a process, the CPU can be developed to today's size and achievements, the history of development is even more intriguing. The product development history of the two CPU giants - Intel and AMD.

[1] Dual-core processors by brand

Intel

Pentium Dual-Core:

It is the Pentium D and Pentium 4EE with Presler cores, basically, you can think of the Presler core as a product of simply loosely coupling two Cedar Mill cores together.

Core 1 Generation

Uses the Yonah core architecture.

[3]Core 2 Generation

Uses the Conroe core (not all).

"Core" is a new, energy-efficient, leading-edge microarchitecture designed to deliver outstanding performance and energy efficiency, improving performance per watt, also known as energy efficiency ratio. Early Core was based on notebook processors.

[edit]Various packages

Bulk CPUs have only one CPU and no packaging. Usually a store warranty of one year. It is usually provided by the manufacturer to the installer, who can't get rid of it and it comes into the market. Some dealers pair the bulk CPU with a fan and package it as the original, making it a repackaged item.

The original package CPU, also known as boxed CPU. The original package CPU, is the manufacturer for the retail market to launch the CPU products, with the original fan and the manufacturer's three-year warranty. In fact, the bulk and boxed CPU itself is no difference in quality, the main difference is that the channel is different, so the warranty is different, the boxed basic 3 years, while the bulk is basically only 1 year, the boxed CPU with the fan is the original package fan, and the bulk does not match the fan, or by the distributor of their own matching fan.

A black box CPU is a top-of-the-line unlocked CPU from a manufacturer, such as AMD's black box 5000+, which comes without a fan and is a retail product from a manufacturer dedicated to overclockers.

Deep-packed CPUs, also known as flip-flop CPUs, are packaged by the distributor in their own bulk, with a fan. There is no manufacturer's warranty, only store warranty, usually store warranty for three years. Or the CPU is smuggled from abroad to the territory, the second packaging, plus fan. These are untaxed and slightly cheaper than bulk.